Programmable semiconductor memory device

Static information storage and retrieval – Systems using particular element – Amorphous

Reexamination Certificate

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C365S189160

Reexamination Certificate

active

07609544

ABSTRACT:
The present invention provides a technology which can suppress a variation in a value after a write operation to minimum so as to facilitate multi-bit operation in a semiconductor device such as a phase change memory. A semiconductor device includes: a memory cell having a storage element (phase change material) that stores information depending on a state change by temperature; an I/O circuit; and means which, when writing data, performs a set operation and an operation for writing desired data, measures a resistance value of the storage element by means of a verify operation, and when the resistance value is not within a target range, performs the set operation and the write operation again while changing a voltage to be applied to the storage element.

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patent: 2003-100084 (2003-04-01), None
M. Gill et al., “Ovonic Unified Memory—A High Performance Nonvolatile Memory Technology for Stand-Alone Memory and Embedded Applications,”IEEE International Solid-State Circuits Conference, Digest of Technical Papers, U.S., 2002, pp. 202-203.
A. Pirovano et al:, “Electronic Switching Effect in Phase-Change Memory Cells,”IEEE International Electron Devices Meeting, Technical Digest, U.S., 2002, pp. 923-926.
Y.N. Hwang et al., “Completely CMOS-Compatible Phase-Change Nonvolatile RAM Using NMOS Cell Transistors,”Non-Volatile Semiconductor Memory Workshop, Digest of Technical Papers, U.S., 2003, pp. 91-92.

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