Method and system for using pattern matching to process an...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

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C716S030000

Reexamination Certificate

active

07555736

ABSTRACT:
Disclosed is a method, system, and computer program product for processing design objects, such as vias, for an integrated circuit design. In one approach, pattern matching is employed to perform DRC/LVS for scattering bars and Vias. A library of via combinations can be used to insert scattering bars into design. This approach of using a library can be applied to other structures in design in addition to vias.

REFERENCES:
patent: 6311319 (2001-10-01), Tu et al.
patent: 2005/0142449 (2005-06-01), Shi et al.
International Search Report and Written Opinion dated May 8, 2008 for PCT/US06/23213.

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