Semiconductor device with split gate memory cell and...

Details Semiconductor device with split gate memory cell and... Semiconductor device with split gate memory cell and...

2006-09-13

2009-12-01

Phung, Anh (Department: 2824)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S321000, C257SE29300

Reexamination Certificate

active

07626224

ABSTRACT:
A split gate memory cell. First and second well regions of respectively first and second conductivity types are formed in the substrate. A floating gate is disposed on a junction of the first and second well regions and insulated from the substrate. A control gate is disposed over the sidewall of the floating gate and insulated from the substrate and the floating gate and partially extends to the upper surface of the floating gate. A doping region of the first conductivity type is formed in the second well region. The first well region and the doping region respectively serve as source and drain regions of the split gate memory cell.

REFERENCES:
patent: 5006974 (1991-04-01), Kazerounian et al.
patent: 5747849 (1998-05-01), Kuroda et al.
patent: 2003/0142550 (2003-07-01), Kawahara et al.
patent: 2005/0079662 (2005-04-01), Miki
patent: 11-026729 (1999-01-01), None
English abstract of JP11-026729, dated Jan. 29, 1999.

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