Processing system, memory and methods for use therewith

Details Processing system, memory and methods for use therewith Processing system, memory and methods for use therewith

2006-08-21

2009-11-17

Bragdon, Reginald G (Department: 2189)

Electrical computers and digital processing systems: memory

Address formation

Address mapping

C714S719000, C714S721000

Reexamination Certificate

active

07620792

ABSTRACT:
A memory includes an array of memory cells arranged in a plurality of rows and a plurality of columns. An address transform module receives a logical address including a logical column address and logical row address, and transforms the logical address into a physical address having a physical row address and a physical column address. An address decoder module accesses an individual memory cell of the array of memory cells based on the physical address.

REFERENCES:
patent: 5923674 (1999-07-01), Nakadai
patent: 6393543 (2002-05-01), Vilkov et al.
patent: 6415030 (2002-07-01), Matsui et al.

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