Memory interface with independent arbitration of precharge,...

Details Memory interface with independent arbitration of precharge,... Memory interface with independent arbitration of precharge,...

2006-12-19

2009-11-10

Bataille, Pierre-Michel (Department: 2186)

Electrical computers and digital processing systems: memory

Storage accessing and control

Control technique

C711S158000

Reexamination Certificate

active

07617368

ABSTRACT:
A memory interface coupling a plurality of clients to a memory having memory banks provides independent arbitration of activate decisions and read/write decisions. In one implementation, precharge decisions are also independently arbitrated.

REFERENCES:
patent: 5666515 (1997-09-01), White et al.
patent: 2002/0194448 (2002-12-01), Yu
patent: 2003/0117860 (2003-06-01), Roohparvar
Micron Semiconductor Products, Inc., “2M, Smart 5 BIOS-Optimized Boot Block Flash Memory,” Flash Memory www.micron.com, copyright 2000, Micron Technology, Inc., pp. 1-12.
Keeth, et al., “DRAM circuit design: a tutorial,” IEEE Press, 2001, pp. 16-23, 142-153.

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