Debug and test system with format select register circuitry

Details Debug and test system with format select register circuitry Debug and test system with format select register circuitry

2006-02-09

2009-06-23

Beausoliel, Robert (Department: 2113)

Error detection/correction and fault detection/recovery

Data processing system error or fault handling

Reliability and availability

C714S727000

Reexamination Certificate

active

07552360

ABSTRACT:
A system and method for sharing a communications link between multiple protocols is described that comprises a system comprising a communications interface configured to exchange information with other systems using at least one of a plurality of protocols; a protocol select register that stores a value that selects a protocol from among the plurality of protocols to become an active protocol; and a state machine accessible to the communications interface, the state machine used to control the exchange of information through the communications interface according to the active protocol. The active protocol is used by the communications interface to exchange information while the remaining protocols of the plurality of protocols remain inactive. The state machine sequences through a series of states that cause the communications interface to operate according to the active protocol, and that are designated as inert sequences under the remaining protocols.

REFERENCES:
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patent: 5706297 (1998-01-01), Jeppesen et al.
patent: 5708773 (1998-01-01), Jeppesen et al.
patent: 6466048 (2002-10-01), Goodman
patent: 2001/0037480 (2001-11-01), Whetsel
patent: 2002/0133795 (2002-09-01), Yamada
patent: 2002/0188782 (2002-12-01), Fay
patent: 2005/0160337 (2005-07-01), Whetsel

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