Delay-locked loop with dynamically biased charge pump

Details Delay-locked loop with dynamically biased charge pump Delay-locked loop with dynamically biased charge pump

2006-02-03

2009-12-15

Fan, Chieh M (Department: 2611)

Pulse or digital communications

Synchronizers

Phase displacement, slip or jitter correction

Reexamination Certificate

active

07634039

ABSTRACT:
A delay-locked loop, including a phase detector configured to receive two signals, one of the signals being delayed relative to the other of the signals, the phase detector having an UP output and a DOWN output. The delay-locked loop also includes a charge pump system operatively coupled with the phase detector, the charge pump system including (1) a charge pump configured to be responsive to assertion of actuating signals from the UP output and the DOWN output so as to control pumping of charge from the charge pump system, such pumped charge being usable to control a delay line carrying one of the two signals, so as to control relative delay occurring between the two signals; and (2) a feedback control loop configured to dynamically adjust at least one bias signal at the charge pump so as to minimize net charge pumped from the charge pump system during simultaneous assertion of actuating signals from the UP output and the DOWN output.

REFERENCES:
patent: 6437619 (2002-08-01), Okuda et al.
patent: 6970029 (2005-11-01), Patel et al.
patent: 7071746 (2006-07-01), Suda et al.
patent: 7292106 (2007-11-01), Maneatis
patent: 2002/0097592 (2002-07-01), Komurasaki et al.
patent: 2002/0101289 (2002-08-01), Maneatis
patent: 2005/0110548 (2005-05-01), Suda et al.
patent: 2007/0164797 (2007-07-01), Law et al.

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