Semiconductor device manufacturing: process – Bonding of plural semiconductor substrates
Reexamination Certificate
2007-07-09
2009-11-24
Thai, Luan C (Department: 2891)
Semiconductor device manufacturing: process
Bonding of plural semiconductor substrates
C438S458000, C438S459000, C438S465000, C438S976000, C438S977000
Reexamination Certificate
active
07622361
ABSTRACT:
It is an object of the invention to provide a peeling method which does not damage a peeling layer, and to perform peeling not only a peeling layer having a small-size area but also an entire peeling layer having a large-size area with a preferable yield. In the invention, after pasting a fixing substrate, a part of a glass substrate is removed by scribing or performing laser irradiation on the glass substrate which leads to providing a trigger. Then, peeling is performed with a preferable yield by performing peeling from the removed part. In addition, a crack is prevented by covering the entire face except for a connection portion of a terminal electrode (including a periphery region of the terminal electrode) with a resin.
REFERENCES:
patent: 5206749 (1993-04-01), Zavracky et al.
patent: 5258325 (1993-11-01), Spitzer et al.
patent: 5317236 (1994-05-01), Zavracky et al.
patent: 5341015 (1994-08-01), Kohno
patent: 5376561 (1994-12-01), Vu et al.
patent: 5674304 (1997-10-01), Fukada et al.
patent: 5757456 (1998-05-01), Yamazaki et al.
patent: 5799392 (1998-09-01), Mishiro
patent: 5821138 (1998-10-01), Yamazaki et al.
patent: 5851862 (1998-12-01), Ohtani et al.
patent: 6033974 (2000-03-01), Henley et al.
patent: 6043800 (2000-03-01), Spitzer et al.
patent: 6118502 (2000-09-01), Yamazaki et al.
patent: 6127199 (2000-10-01), Inoue et al.
patent: 6268695 (2001-07-01), Affinito
patent: 6310362 (2001-10-01), Takemura
patent: 6320691 (2001-11-01), Ouchi et al.
patent: 6362866 (2002-03-01), Yamazaki et al.
patent: 6372608 (2002-04-01), Shimoda et al.
patent: 6376333 (2002-04-01), Yamazaki et al.
patent: 6423614 (2002-07-01), Doyle
patent: 6645830 (2003-11-01), Shimoda et al.
patent: 6653206 (2003-11-01), Yanagita et al.
patent: 6682963 (2004-01-01), Ishikawa
patent: 6744116 (2004-06-01), Doyle
patent: 6849877 (2005-02-01), Yamazaki et al.
patent: 6875998 (2005-04-01), Kato et al.
patent: 6946361 (2005-09-01), Takayama et al.
patent: 6979629 (2005-12-01), Yanagita et al.
patent: 7067392 (2006-06-01), Yamazaki et al.
patent: 7098069 (2006-08-01), Yamazaki et al.
patent: 7109071 (2006-09-01), Ishikawa
patent: 7446339 (2008-11-01), Yamazaki et al.
patent: 2003/0032210 (2003-02-01), Takayama et al.
patent: 2003/0047280 (2003-03-01), Takayama et al.
patent: 2003/0082889 (2003-05-01), Maruyama et al.
patent: 2004/0239827 (2004-12-01), Yamazaki et al.
patent: 2005/0158936 (2005-07-01), Kato et al.
patent: 1 178 521 (2002-02-01), None
patent: 10-125929 (1998-05-01), None
patent: 10-125930 (1998-05-01), None
patent: 10-125931 (1998-05-01), None
patent: WO 2004/064018 (2004-07-01), None
European Search Report dated Jan. 18, 2006 for Application No. 04024864.3.
European Search Report dated May 26, 2006 for Application No. 04024864.3.
Toru Takayama et al., “A CPU on a Plastic Film Substrate,” 2004 Symposium on VLSI Technology Digest of Technical Papers, Jun. 15-17, 2004, pp. 230-231.
Fukumoto Yumiko
Goto Yuugo
Maruyama Junya
Takayama Toru
Tsurume Takuya
Robinson Eric J.
Robinson Intellectual Property Law Office P.C.
Semiconductor Energy Laboratory Co,. Ltd.
Thai Luan C
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