Method and apparatus for maintaining cache coherency in a...

Details Method and apparatus for maintaining cache coherency in a... Method and apparatus for maintaining cache coherency in a...

2004-07-21

2009-02-24

Kim, Matt (Department: 2186)

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

C711S146000, C711S003000

Reexamination Certificate

active

07496713

ABSTRACT:
In data processing systems that use a snoopy based cache coherence protocol and which contain a read only cache memory with a bounded range of addresses, a cache line hit is detected by assuming that, if an address contained in a request falls within the bounded range, the cache line is present in the cache memory for snoop results. This is equivalent to assuming that the cache line is marked as shared when it might not be so marked.

REFERENCES:
patent: 6003106 (1999-12-01), Fields et al.
patent: 2004/0039880 (2004-02-01), Pentkovski et al.
Daniel J. Sorin, Manoj Plakal, Anne E. Condon, Mark D. Hill, Milo M.K. Martin and David A. Wood, Specifying and Verifying a Broadcast and a Multicast Snooping Cache Coherence Protocol, IEEE Transactions on Parallel and Distributed Systems, vol. 13, No. 6, Jun. 2002, pp. 1-23.

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