Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Chip mounted on chip
Reexamination Certificate
2006-04-28
2009-11-10
Wilczewski, M. (Department: 2822)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Chip mounted on chip
C257S685000, C257S687000, C257S698000, C257S690000, C257S723000
Reexamination Certificate
active
07615870
ABSTRACT:
Cut pieces of a flexible tape respectively having positioning holes are superposed on a substrate having positioning holes, while positioning the substrate and the cut pieces by inserting a positioning pin into the positioning holes respectively, so that one side of the substrate faces one side of the cut pieces. Subsequently, internal terminals provided on the substrate are ultrasonically joined with internal terminals provided on the cut pieces by pressing an ultrasonic tool from the other side of the cut pieces. As a result, connection between these can be performed highly accurately. Further, since the internal terminals are ultrasonically joined with each other, operation time does not increase in proportion to the number of terminals, as in the connection using a bonding wire, and misregistration due to heat does not occur. Accordingly, connections between circuit boards are performed efficiently, highly accurately, and reliably.
REFERENCES:
patent: 6239496 (2001-05-01), Asada
patent: 2004/0251536 (2004-12-01), Hatada et al.
patent: 2005/0133897 (2005-06-01), Baek et al.
patent: 2006/0249829 (2006-11-01), Katagiri et al.
patent: 2002-76240 (2002-03-01), None
patent: 2004-014605 (2004-01-01), None
patent: 2005-101132 (2005-04-01), None
Japanese Office Action, with a partial English translation, issued in Japanese Patent Application No. 2005-131020, mailed Apr. 7, 2009.
Kanda Naoya
Shibamoto Masanori
Yamaguchi Masahiro
Elpida Memory Inc.
Green Telly D
McDermott Will & Emery LLP
Wilczewski M.
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