Method for patterning metal line in semiconductor device

Details Method for patterning metal line in semiconductor device Method for patterning metal line in semiconductor device

2006-12-18

2009-12-15

Menz, Laura M (Department: 2813)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

Insulated gate formation

C438S652000, C438S199000

Reexamination Certificate

active

07632746

ABSTRACT:
A method for patterning a metal line includes forming a barrier metal layer and a metal layer, etching the metal layer, etching the barrier metal layer to form a passivation layer on an etched surface of the barrier metal layer, and cleaning a resultant structure where the passivation layer is formed.

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patent: 2001/0005622 (2001-06-01), Kim et al.
patent: 2008/0003813 (2008-01-01), Nam et al.
patent: 04-245625 (1992-09-01), None
patent: 10-2005-0015116 (2005-02-01), None
patent: 1020060038611 (2006-05-01), None

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