Method of forming semiconductor device

Details Method of forming semiconductor device Method of forming semiconductor device

2007-08-29

2009-11-03

Dang, Trung (Department: 2892)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257SE21632, C257SE21644, C257SE27067, C438S223000

Reexamination Certificate

active

07612415

ABSTRACT:
Embodiments relate to a method of forming a 90 nm semiconductor device, including forming an isolation film within a semiconductor substrate in which a pMOS region and an nMOS region are defined. A first mask is formed to shield the nMOS region by using a DUV photoresist having a thickness of approximately 0.7 to 0.75 μm. Ions are implanted into the pMOS region to form a p type well. A second mask is formed to shield the pMOS region by using a DUV photoresist having a thickness of approximately 0.7 to 0.75 μm. Ions are implanted into the nMOS region to form an n type well. A gate oxide film and a gate is formed over the semiconductor substrate. A low-concentration impurity may be implanted by using the gate as a mask. An LDD region may be formed. A sidewall spacer may be formed over both sidewalls of the gate. A high-concentration impurity is implanted by using the sidewall spacer as a mask, forming a source/drain region.

REFERENCES:
patent: 6060345 (2000-05-01), Hause et al.
patent: 6576405 (2003-06-01), Buffat et al.
patent: 6586296 (2003-07-01), Watt
patent: 6927002 (2005-08-01), Hattori et al.
patent: 2004/0023462 (2004-02-01), Rotondaro et al.

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