Logic circuit, system for reducing a clock skew, and method...

Electronic digital logic circuitry – Clocking or synchronizing of logic stages or gates

Reexamination Certificate

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Details

C326S038000

Reexamination Certificate

active

07495476

ABSTRACT:
A logic circuit includes a first flip-flop configured to include a first input terminal introducing a clock, a first output terminal supplying the clock and a first internal wiring connecting the first input terminal and the first output terminal, and a second flip-flop configured to be adjacent to the first flip-flop and be supplied with the clock from the first output terminal.

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