Method and system for automatically optimizing physical...

Details Method and system for automatically optimizing physical... Method and system for automatically optimizing physical...

2006-08-31

2009-02-10

Chiang, Jack (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000, C716S030000, C716S030000, C716S030000

Reexamination Certificate

active

07490309

ABSTRACT:
A method and system are provided for optimizing physical implementation of an electronic circuit responsive to simulation analysis thereof. The method and system include schematically defining the electronic circuit to include a plurality of circuit elements interconnected at respective nodes by a plurality of nets, and acquiring parametric values for a plurality of predetermined operational parameters from simulated operation of the electronic circuit. The parametric values are automatically processed to generate a plurality of parametric constraints corresponding thereto for optimizing physical implementation of the electronic circuit. A circuit layout at least partially representing a physical implementation of the schematic definition is then generated. The circuit layout, which includes a plurality of devices interconnected by a plurality of tracks, is adaptively configured in accordance with the parametric constraints.

REFERENCES:
patent: 6496962 (2002-12-01), Dalton
patent: 7024640 (2006-04-01), Buchanan
patent: 2003/0212964 (2003-11-01), Rao et al.
patent: 2005/0120319 (2005-06-01), van Ginneken
patent: 2005/0268268 (2005-12-01), Wang et al.

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