Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Bump leads
Reexamination Certificate
2006-10-27
2009-12-08
Vu, David (Department: 2818)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Bump leads
C257S772000, C257S781000, C257SE21508, C257SE23021
Reexamination Certificate
active
07629687
ABSTRACT:
A semiconductor device includes a wiring board having a plurality of conductive wires aligned on an insulating base material and a board bump with a plated metal formed on each conductive wire so as to cover an upper surface and both sides of the conductive wire; and a semiconductor chip mounted on the wiring board, with electrodes of the semiconductor chip being connected to the conductive wires via the board bumps. Chip bumps are formed on the electrodes of the semiconductor chip. The electrodes of the semiconductor chip are connected to the conductive wires via a bond between the chip bumps and the board bumps. Protruding portions are formed by part of the plated metal of the board bumps at the bonded portion peeling off and protruding outwardly from a bonding surface of the chip bumps and the board bumps. Mechanical damage to the semiconductor chip caused by ultrasonic vibrations applied during process of mounting the semiconductor chip.
REFERENCES:
patent: 5427301 (1995-06-01), Pham et al.
patent: 5477087 (1995-12-01), Kawakita et al.
patent: 5616520 (1997-04-01), Nishiuma et al.
patent: 5655700 (1997-08-01), Pham et al.
patent: 5828128 (1998-10-01), Higashiguchi et al.
patent: 6137184 (2000-10-01), Ikegami
patent: 6232668 (2001-05-01), Hikita et al.
patent: 6269999 (2001-08-01), Okazaki et al.
patent: 6399419 (2002-06-01), Shibata et al.
patent: 6461890 (2002-10-01), Shibata
patent: 6565687 (2003-05-01), Gotoh et al.
patent: 6635962 (2003-10-01), Shibata et al.
patent: 6821813 (2004-11-01), Su
patent: 6838316 (2005-01-01), Iizuka et al.
patent: 6933615 (2005-08-01), Maeda
patent: 7115446 (2006-10-01), Koo et al.
patent: 7264146 (2007-09-01), Takeuchi et al.
patent: 7285734 (2007-10-01), Imamura et al.
patent: 7288729 (2007-10-01), Imamura et al.
patent: 7294532 (2007-11-01), Imamura et al.
patent: 7307349 (2007-12-01), Hikita et al.
patent: 7382050 (2008-06-01), Matsumura et al.
patent: 7429796 (2008-09-01), Abe et al.
patent: 2002/0031904 (2002-03-01), Shibata et al.
patent: 2002/0070459 (2002-06-01), Iwasaki et al.
patent: 2002/0127773 (2002-09-01), Shibata et al.
patent: 2002/0145362 (2002-10-01), Taga
patent: 2002/0149118 (2002-10-01), Yamaguchi et al.
patent: 2004/0178486 (2004-09-01), Maeda
patent: 2004/0212969 (2004-10-01), Imamura et al.
patent: 2004/0217474 (2004-11-01), Kajiwara et al.
patent: 2004/0229425 (2004-11-01), Yamaguchi et al.
patent: 2005/0110163 (2005-05-01), Koo et al.
patent: 2005/0218485 (2005-10-01), Imamura et al.
patent: 2005/0218496 (2005-10-01), Imamura et al.
patent: 2006/0237841 (2006-10-01), Matsumura et al.
patent: 2007/0108627 (2007-05-01), Kozaka et al.
patent: 2007/0222085 (2007-09-01), Abe et al.
patent: 2008/0164608 (2008-07-01), Matsumura et al.
patent: 2008/0173477 (2008-07-01), Imamura et al.
patent: 2004-327936 (2004-11-01), None
Takahashi et al., Ultra-high-density interconnection technology of three-dimensional packaging, Microelectronics Reliability, 2003, pp. 1267-1279.
Bonkohara et al., Trends and Opportunities of System-in-a-Package and Three-Dimensional Integration, Electronics and Communications in Japan, Part 2, vol. 88, No. 10, 2005, pp. 37-49.
Kim et al., Soldering Method Using Longitudinal Ultrasonic, IEEE Transactions on Components and Packaging Technologies, vol. 28, No. 3, 2005, pp. 493-498.
Lee et al., Thermosonic Bonding of Lead-Free Solder with Metal Bump for Flip-Chip Bonding, Journal of Electronic Materials, vol. 34, No. 1, 2005, pp. 96-102.
Maruo et al., Ultrasonic Flip Chip Bonding, Electronic Circuit World Conference, par of APEX/IPC Printed Circuits Expo, 2005, pp. 1-3.
Tanida et al., Au Bump Interconnection with Ultrasonice Flip-Chip Bonding in 20 um Pitch, Japan Journal of Applied Physics, vol. 42, 2003, pp. 2198-2203.
Tatsumi et al., An Application of Micro-ball Wafer Bumping to Double Ball Bump for Flip Chip Interconnection, IEEE Electronic Components and Technology Conference, 2005, pp. 855-860.
Watanabe et al., Behavior of Plated Microbumps during Ultrasonice Flip-Chip Bonding Determined from Dynamic Strain Measurement, Japan Journal of Applied Physics, vol. 42, 2003, pp. 2193-2197.
Fukuda Toshiyuki
Kozaka Yukihiro
Matsumura Kazuhiko
Shimoishizaka Nozomi
Hamre Schumann Mueller & Larson P.C.
Panasonic Corporation
Taylor Earl N
Vu David
LandOfFree
Semiconductor device and method for manufacturing the same does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor device and method for manufacturing the same, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor device and method for manufacturing the same will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4114425