Memory controller for daisy chained self timed memory chips

Details Memory controller for daisy chained self timed memory chips Memory controller for daisy chained self timed memory chips

2006-07-26

2009-08-18

Ellis, Kevin L (Department: 2187)

Electrical computers and digital processing systems: memory

Storage accessing and control

Access timing

C711S154000, C711S170000

Reexamination Certificate

active

07577811

ABSTRACT:
A memory controller for controlling a daisy chain of self timed memory chips. The memory controller has information as to how long each self timed memory chip in the daisy chain of memory chips takes to make a read access and a write access to an array on the self timed memory chip. The memory controller determines current access time information on a memory chip by sending a command to the memory chip. The memory chip returns a data word containing the current access time information. Alternatively, the memory controller transmits an address/command word to the memory chip and, after completing an access, transmits a responsive data word to the memory controller. The memory controller determines the access time information using the interval from transmission of the address/command word to reception of the responsive data word.

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