Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
Reexamination Certificate
2006-10-13
2009-10-13
Vu, David (Department: 2818)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
On insulating substrate or layer
C257S059000, C257SE29282, C257SE29151, C257SE29202, C257SE29273, C257SE21413
Reexamination Certificate
active
07601566
ABSTRACT:
It is an object of the present invention to provide a method for preventing a breaking and poor contact, without increasing the number of steps, thereby forming an integrated circuit with high driving performance and reliability. The present invention applies a photo mask or a reticle each of which is provided with a diffraction grating pattern or with an auxiliary pattern formed of a semi-translucent film having a light intensity reducing function to a photolithography step for forming wires in an overlapping portion of wires. And a conductive film to serve as a lower wire of a two-layer structure is formed, and then, a resist pattern is formed so that a first layer of the lower wire and a second layer narrower than the first layer are formed for relieving a steep step.
REFERENCES:
patent: 6887742 (2005-05-01), Baek et al.
patent: 6897477 (2005-05-01), Shibata et al.
patent: 7169656 (2007-01-01), Ohnuma et al.
patent: 7223643 (2007-05-01), Ohnuma et al.
patent: 7316946 (2008-01-01), Ohnuma et al.
patent: 7335538 (2008-02-01), Chou et al.
patent: 7374983 (2008-05-01), Okamoto
patent: 2002/0094612 (2002-07-01), Nakamura et al.
patent: 2002/0102776 (2002-08-01), Yamazaki et al.
patent: 2006/0275710 (2006-12-01), Yamazaki et al.
patent: 2006/0278875 (2006-12-01), Ohnuma et al.
patent: 2006/0292865 (2006-12-01), Yamazaki et al.
patent: 2007/0001225 (2007-01-01), Ohnuma et al.
patent: 2007/0023790 (2007-02-01), Ohnuma et al.
patent: 2007/0037069 (2007-02-01), Ohnuma et al.
patent: 2007/0037070 (2007-02-01), Ohnuma et al.
patent: 2007/0037311 (2007-02-01), Izumi et al.
patent: 2007/0139571 (2007-06-01), Kimura
patent: 2008/0119024 (2008-05-01), Ohnuma et al.
patent: 59-068952 (1984-04-01), None
patent: 01-205596 (1989-08-01), None
patent: 2000-151523 (2000-05-01), None
patent: 02-151523 (2002-05-01), None
Kim.C et al., “A Novel Four-Mask-Count Process Architecture for TFT-LCDS”, SID Digest '00 : SID International Symposium Digest of Technical Papers, 2000, pp. 1006-1009.
Kuwabara Hideaki
Ohnuma Hideto
Sakakura Masayuki
Fish & Richardson P.C.
Fox Brandon
Semiconductor Energy Laboratory Co,. Ltd.
Vu David
LandOfFree
Semiconductor device and manufacturing method thereof does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor device and manufacturing method thereof, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor device and manufacturing method thereof will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4103806