Methods of forming capacitors including expanded contact holes

Details Methods of forming capacitors including expanded contact holes Methods of forming capacitors including expanded contact holes

1997-11-04

1999-06-15

Nguyen, Tuan H.

Semiconductor device manufacturing: process

Making passive device

Planar capacitor

438250, H01L 2120

Patent

active

059131268

ABSTRACT:
A method of forming an integrated circuit device includes the steps of forming a first insulating layer on an integrated circuit substrate, forming a first capacitor electrode on the insulating layer opposite the substrate, and forming a second insulating layer on the first capacitor electrode and on the insulating layer opposite the substrate. A contact hole is formed in the second insulating layer thus exposing a surface of the first capacitor electrode. In particular, the contact hole exposes an edge portion of the first capacitor electrode and extends beyond the edge portion of the first capacitor electrode. A capacitor dielectric layer is formed on the exposed portion of the first capacitor electrode wherein the capacitor dielectric layer extends beyond the edge portion of the first capacitor electrode. A second capacitor electrode is formed on the dielectric layer wherein the second capacitor electrode extends beyond the edge portion of the first capacitor electrode. Related structures are also discussed.

REFERENCES:
patent: 4918503 (1990-04-01), Okuyama
patent: 4931897 (1990-06-01), Tsukamoto et al.
patent: 5436477 (1995-07-01), Hashizume et al.
patent: 5486713 (1996-01-01), Koyama
patent: 5618761 (1997-04-01), Eguchi et al.
patent: 5763300 (1998-06-01), Park et al.

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