Circuit and method for controlling self-refresh cycle

Details Circuit and method for controlling self-refresh cycle Circuit and method for controlling self-refresh cycle

2006-12-29

2009-11-17

Phung, Anh (Department: 2824)

Static information storage and retrieval

Read/write circuit

Data refresh

C365S201000

Reexamination Certificate

active

07619943

ABSTRACT:
The present invention relates to a circuit and a method for controlling a self-refresh cycle of a dynamic random access memory or DRAM. A cell voltage is directly detected so that a self-refresh cycle can be variably controlled. Detectors each detecting whether or not a voltage charged into a capacitor of a detection cell drops to or below a reference voltage and outputs a detection signal. A pulse generator generates a self-refresh pulse while being linked with an enabled detection signal of the plurality of detectors. A self-refresh cycle can be variably controlled and set to be suitable for the charging capacity of a cell. The detection cell is adapted to the change of the charging capacity of the cell in accordance with a change in temperature.

REFERENCES:
patent: 5365487 (1994-11-01), Patel et al.
patent: 5453959 (1995-09-01), Sakuta et al.
patent: 5717652 (1998-02-01), Ooishi
patent: 7260011 (2007-08-01), Riho et al.
patent: 19960032486 (1996-09-01), None
patent: 1020000065430 (2000-11-01), None
Notice of Preliminary Rejection—Korean Intellectual Property Office Jul. 20, 2007.

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