Semiconductor memory device and method for operating the same

Details Semiconductor memory device and method for operating the same Semiconductor memory device and method for operating the same

2006-11-20

2009-11-03

Ho, Hoai V (Department: 2827)

Static information storage and retrieval

Systems using particular element

Flip-flop

C365S156000, C365S181000, C365S185230

Reexamination Certificate

active

07613030

ABSTRACT:
A semiconductor memory device is provided, which comprises an analog switch, a first inverter, a second inverter, and a clocked inverter. A first terminal of the analog switch is electrically connected to a first data line. A second terminal of the analog switch is electrically connected to an input terminal of the first inverter, an output terminal of the second inverter, and an input terminal of the clocked inverter. An output terminal of the first inverter is electrically connected to an input terminal of the second inverter. An output terminal of the clocked inverter is electrically connected to a second data line. Each of the analog switch and the clocked inverter is electrically connected to at least one word line. The word line electrically connected to the analog switch is different from the word line electrically connected to the clocked inverter.

REFERENCES:
patent: 4112506 (1978-09-01), Zibu
patent: 4441169 (1984-04-01), Sasaki et al.
patent: 4779231 (1988-10-01), Holzapfel et al.
patent: 4933899 (1990-06-01), Gibbs
patent: 5036487 (1991-07-01), Karetsos et al.
patent: 5353251 (1994-10-01), Uratani et al.
patent: 5898619 (1999-04-01), Chang et al.
patent: 5949706 (1999-09-01), Chang et al.
patent: 5987534 (1999-11-01), Shibayama
patent: 6515511 (2003-02-01), Sugibayashi et al.
patent: 6683602 (2004-01-01), Hioki
patent: 6775180 (2004-08-01), Biyani et al.
patent: 7088607 (2006-08-01), Matsuzawa et al.
patent: 7099189 (2006-08-01), Plants
patent: 2003/0076282 (2003-04-01), Ikeda et al.
patent: 2003/0098875 (2003-05-01), Kurokawa et al.
patent: 2004/0120209 (2004-06-01), Lee et al.
patent: 2005/0213415 (2005-09-01), Matsuzawa et al.
patent: 2006/0261946 (2006-11-01), Himberger et al.
patent: 0365445 (1990-04-01), None
patent: 08-161890 (1996-06-01), None
patent: 2005-276277 (2005-10-01), None
patent: WO 88/09037 (1988-11-01), None
Hiroki Dembo at al., RFCPUs on Glass and Plastic Substrates fabricated by TFT Transfer Technology, IEDM 05, pp. 1067-1069.
European Search Report, Application Serial No. 06023745.0, dated Dec. 20, 2007, 10 pages.
E.J. Nowak et al., “A Functional FinFET-DGCMOS SRAM Cell,” IEDM 2002: Techinical Digest of International Electron Devices Meeting, 2002, pp. 411-414.
Jae-Hong Park et al., “A Study on the Fabrication of a Multigate/Multichannel Polysilicon Thin Film Transistor,” Japanese Journal of Applied Physics, vol. 36, Part 1, No. 3B, Mar. 1997, pp. 1428-1432.
European Office Action issued in European Patent Application No. 06 023 745.0-1233 dated Jan. 27, 2009.

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