Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of...
Reexamination Certificate
2006-09-15
2009-12-15
Luu, Chuong A. (Department: 2892)
Semiconductor device manufacturing: process
Coating of substrate containing semiconductor region or of...
C257S781000, C257S780000, C257S784000
Reexamination Certificate
active
07632759
ABSTRACT:
A semiconductor device (2) has a semiconductor chip (16) the front side (1) of which has integrated circuit elements and an electrically conductive metallization structure (3) with chip contact areas (9). The metallization structure (3) has an electrically conductive patterned adhesion layer (6), which provides a low-resistance contact with silicon, and an electrically conductive patterned intermediate layer (7), which provides a connectable surface. Furthermore, a passivation layer (8) is provided, which covers the top side and the edge sides of the intermediate layer (7) whilst leaving the chip contact area (9) free. The intermediate layer (7) comprises Ni and is free of noble metals. The intermediate layer (7) is at least 10 times thicker than the adhesion layer (6).
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Huang et al., Thin Cracking and Ratcheting Caused by Terperature Cycling, J. Mater. Res., vol. 15, No. 6, pp. 1239-1242, 2000.
Hoeglauer Josef
Otremba Ralf
Banner & Witcoff , Ltd.
Infineon - Technologies AG
Luu Chuong A.
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