Dispatching instructions in a processor supporting out-of-order

Details Dispatching instructions in a processor supporting out-of-order Dispatching instructions in a processor supporting out-of-order

1997-03-31

1999-06-15

Treat, William M.

395591, G06F 938

Patent

active

059130482

ABSTRACT:
The invention relates to a method for issuing instructions in a processor. In one version of the invention, the method includes the steps of assigning an identification tag to an instruction, and dispatching the instruction, the identification tag and source information to an execution queue.

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