Non-volatile memory cells utilizing substrate trenches

Details Non-volatile memory cells utilizing substrate trenches Non-volatile memory cells utilizing substrate trenches

2006-06-08

2009-02-17

Wojciechowicz, Edward (Department: 2815)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S314000, C257S319000, C438S270000, C438S524000, C438S525000

Reexamination Certificate

active

07491999

ABSTRACT:
Several embodiments of flash EEPROM split-channel cell arrays are described that position the channels of cell select transistors along sidewalls of trenches in the substrate, thereby reducing the cell area. Select transistor gates are formed as part of the word lines and extend downward into the trenches with capacitive coupling between the trench sidewall channel portion and the select gate. In one embodiment, trenches are formed between every other floating gate along a row, the two trench sidewalls providing the select transistor channels for adjacent cells, and a common source/drain diffusion is positioned at the bottom of the trench. A third gate provides either erase or steering capabilities. In another embodiment, trenches are formed between every floating gate along a row, a source/drain diffusion extending along the bottom of the trench and upwards along one side with the opposite side of the trench being the select transistor channel for a cell. In another embodiment, select transistor gates of dual floating gate memory cells are extended into trenches or recesses in the substrate in order to lengthen the select transistor channel as the surface dimensions of the cell are being decreased. Techniques for manufacturing such flash EEPROM split-channel cell arrays are also included.

REFERENCES:
patent: 4112507 (1978-09-01), White et al.
patent: 4811067 (1989-03-01), Fitzgerald et al.
patent: 4835741 (1989-05-01), Baglee
patent: 4890145 (1989-12-01), Malhi
patent: 4975384 (1990-12-01), Baglee
patent: 4990979 (1991-02-01), Otto
patent: 5070032 (1991-12-01), Yuan et al.
patent: 5095344 (1992-03-01), Harari
patent: 5168334 (1992-12-01), Mitchell et al.
patent: 5172338 (1992-12-01), Mehrotra et al.
patent: 5313421 (1994-05-01), Guterman et al.
patent: 5315142 (1994-05-01), Acovic et al.
patent: 5315541 (1994-05-01), Harari et al.
patent: 5343063 (1994-08-01), Yuan et al.
patent: 5411905 (1995-05-01), Acovic et al.
patent: 5486714 (1996-01-01), Hong
patent: 5495441 (1996-02-01), Hong
patent: 5498564 (1996-03-01), Geissler et al.
patent: 5576567 (1996-11-01), Mori
patent: 5579259 (1996-11-01), Samachisa et al.
patent: 5606521 (1997-02-01), Kuo et al.
patent: 5616510 (1997-04-01), Wong
patent: 5643814 (1997-07-01), Chung
patent: 5661053 (1997-08-01), Yuan
patent: 5712180 (1998-01-01), Guterman et al.
patent: 5786612 (1998-07-01), Otani et al.
patent: 5851881 (1998-12-01), Lin et al.
patent: 5891774 (1999-04-01), Ueda et al.
patent: 5949101 (1999-09-01), Aritome
patent: 6011725 (2000-01-01), Eitan
patent: 6017793 (2000-01-01), Oyama
patent: 6037221 (2000-03-01), Lee et al.
patent: 6103573 (2000-08-01), Harari et al.
patent: 6137718 (2000-10-01), Reisinger
patent: 6151248 (2000-11-01), Harari et al.
patent: 6222762 (2001-04-01), Guterman et al.
patent: 6248633 (2001-06-01), Ogura et al.
patent: 6281075 (2001-08-01), Yuan et al.
patent: 6316315 (2001-11-01), Hofmann et al.
patent: 6346725 (2002-02-01), Ma et al.
patent: 6391716 (2002-05-01), Liou
patent: 6512263 (2003-01-01), Yuan et al.
patent: 6532172 (2003-03-01), Harari et al.
patent: 6894343 (2005-05-01), Harari et al.
patent: 6936887 (2005-08-01), Harari et al.
patent: 7087951 (2006-08-01), Harari et al.
patent: 2002/0118574 (2002-08-01), Gongwer et al.
patent: 2002/0130350 (2002-09-01), Shin et al.
patent: 0 601 747 (1994-06-01), None
patent: 03-042873 (1991-02-01), None
patent: 10-041414 (1998-02-01), None
patent: 252221 (1995-07-01), None
patent: WO 97/32309 (1997-09-01), None
“Notification of Transmittal of the International Search Report or the Declaration”, European Patent Office, International Searching Authority, Jan. 29, 2003, 7 pages.
Chan et al., “A True Single-Transistor Oxide-Nitride-Oxide EEPROM Device,”IEEE Electron Device Letters, vol. EDL-8, No. 3, Mar. 1987, pp. 93-95.
Nozaki et al., “A 1-Mb EEPROM with MONOS Memory Cell for Semiconductor Disk Application,”IEEE Journal of Solid State Circuits, vol. 26, No. 4, Apr. 1991, pp. 497-501.
Eitan et al., “NROM: A Novel Localized Trapping, 2-Bit Nonvolatile Memory Cell,”IEEE Electron Device Letters, vol. 21, No. 11, Nov. 2000, pp. 543-545.
DiMaria et al., “Electrically-Alterable Read-Only-Memory Using Si-rich SIO2Injectors and a Floating Polycrystalline Silicon Storage Layer,”J. Appl. Phys. 52(7), Jul. 1981, pp. 4825-4842.
Hori et al., “A MOSFET with Si-Implanted Gate-Si02Insulator for NonVolatile Memory Applications,” IEDM 92, Apr. 1992, pp. 469-472.
Ogura et al. “Low Voltage, Low Current, High Speed Program step split gate Cell with Ballistic Direct Injection for EEPROM/Flash,”IEEE Publication, Sep. 1998, pp. 36.5.1-36.5.4.
Di-Son Kuo et al., “TEFET—A High Density, Low Erase Voltage, Trench Flash EEPROM,”IEEE Publication, Apr. 1994, pp. 51-52.
Pein et al., “Performance of the 3-D Sidewall Flash EPROM Cell,”Syposium on VLSI Technology Digest of Technical Papers(IEEE), Nov. 1993, pp. 2.1.1-2.1.4.
The Patent Office of the Peoples's Republic of China, “Notification of the First Office Action,” mailed in related Chinese Application No. 02802141.X on Apr. 1, 2005, 8 pages.
Korean Patent Office, “Office Action,” corresponding Korean Patent Application No. 2003-7000786, mailed on Aug. 25, 2008, 4 pages (including translation.)

Affiliated with

Also associated with

Rating

Non-volatile memory cells utilizing substrate trenches does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Non-volatile memory cells utilizing substrate trenches, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Non-volatile memory cells utilizing substrate trenches will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-4085536