Instruction control method and processor to process...

Electrical computers and digital processing systems: processing – Processing control – Branching

Reexamination Certificate

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C712S035000

Reexamination Certificate

active

07603545

ABSTRACT:
An instruction control method carries out an instruction in a processor to process instructions by out-of-order processing, using delay instructions for branching. The processor includes a storage unit, a branch predictor making branch predictions and a control unit which successively stores a plurality of delay instructions in the storage unit together with information indicating whether or not branch instructions corresponding to the delay instructions are predicted to branch by the branch predictor.

REFERENCES:
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patent: 6883090 (2005-04-01), Kruckemyer
patent: 3-122718 (1991-05-01), None
patent: 4-213727 (1992-08-01), None
patent: 6-110683 (1994-04-01), None
patent: 7-93151 (1995-04-01), None
Computer Organization and Design The Hardware/Software Interface David A. Patterson and John L. Hennessy 1998 Morgan Kaufmann Publishers, Inc.
The SPARC Architecture Manual Version 8 Revision SAV080SI9308 1992.
The SPARC Architecture Manual Version 8 Revision SAV080SI9308 1992; pp. 13 and 14.
Japanese Office Action dated Jan. 24, 2006 of Japanese Application No. 2002-190556.

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