Method of manufacturing metal insulating layer in...

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

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C438S618000, C438S625000, C438S637000, C438S672000

Reexamination Certificate

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07638422

ABSTRACT:
A method of forming a metal insulating layer of a semiconductor device relieves stress due to differential thermal expansion between insulating sub-layers by rounding off sharp edges formed between the sub-layers. A first metal insulating sub-layer is formed over a metal interconnection layer pattern. The first metal insulating sub-layer has sharp profiles due to a step height difference in the metal interconnection layer pattern. The first metal insulating sub-layer is wet etched to round off the sharp profiles. A second metal insulating sub-layer is formed over the first metal insulating sub-layer.

REFERENCES:
patent: 5162261 (1992-11-01), Fuller et al.
patent: 5494854 (1996-02-01), Jain
patent: 6211040 (2001-04-01), Liu et al.
patent: 2003/0008492 (2003-01-01), Jung et al.
patent: 2006/0022343 (2006-02-01), Lin et al.

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