Semiconductor integrated circuit and layout designing method...

Details Semiconductor integrated circuit and layout designing method... Semiconductor integrated circuit and layout designing method...

2006-09-15

2009-12-22

Dinh, Paul (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000, C716S030000

Reexamination Certificate

active

07636906

ABSTRACT:
A semiconductor integrated circuit of the present invention comprises a hard macro and a plurality of wirings connected to the hard macro. The hard macro comprises a hard macro main body, and a plurality of pins with a minimum pin width based on a design rule of the semiconductor integrated circuit, which is connected to the wirings. Each of the pins is arranged in a vicinity of the peripheral edge of the hard macro main body with a minimum isolated space based on the design rule provided therebetween along a direction crossing with a width direction of the peripheral edge. The wirings are arranged obliquely along a direction crossing with a perpendicular direction of the peripheral edge.

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