Non-volatile memory

Details Non-volatile memory Non-volatile memory

2007-08-15

2009-02-03

Smith, Zandra (Department: 2822)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S316000, C257S324000, C257S405000, C257S411000

Reexamination Certificate

active

07485919

ABSTRACT:
A non-volatile memory and a method of fabricating the same are described. First, a substrate is provided. Then, a plurality of stack structures is formed on the substrate. Each stack structure comprises, from bottom to top, a bottom dielectric layer, a charge trapping layer, a top dielectric layer, a control gate and a cap layer. Next, a plurality of spacers is formed on the sidewalls of the stack structures. Thereafter, a gate dielectric layer is formed over the substrate. A word line is formed between two neighboring stack structures. After that, the cap layers in the stack structures are removed. A source and a drain are formed in the substrate beside the stack structures adjacent to the sides of each word line.

REFERENCES:
patent: 6194784 (2001-02-01), Parat et al.
patent: 6713350 (2004-03-01), Rudeck
patent: 6955965 (2005-10-01), Halliyal et al.

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