Static information storage and retrieval – Read/write circuit – Testing
Reexamination Certificate
2007-06-29
2009-11-17
Nguyen, VanThu (Department: 2824)
Static information storage and retrieval
Read/write circuit
Testing
C365S189050, C365S191000, C365S233130, C327S142000
Reexamination Certificate
active
07619937
ABSTRACT:
A semiconductor memory device performs a reset operation at a wafer state by using a signal input through an address pin in a test mode. The semiconductor memory device includes a buffer for transferring a reset command in response to a reset-active signal and a test reset signal, a test-reset entry signal generation unit for generating an internal test-reset entry signal in response to the test reset signal, and a rest signal driving unit for driving an active signal of an output signal of the buffer and the internal test-reset entry signal as an internal reset signal for a reset mode entry.
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Park Kee-Teok
Yun Tae-Sik
Hynix / Semiconductor Inc.
IP & T Law Firm PLC
Nguyen Van-Thu
Reidlinger R Lance
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