Partial register forwarding for CPUs with unequal delay...

Details Partial register forwarding for CPUs with unequal delay... Partial register forwarding for CPUs with unequal delay...

2007-04-02

2009-11-03

Coleman, Eric (Department: 2183)

Electrical computers and digital processing systems: processing

Dynamic instruction dependency checking, monitoring or...

Scoreboarding, reservation station, or aliasing

C712S218000

Reexamination Certificate

active

07613905

ABSTRACT:
A data processing apparatus includes a register file and a plurality of functional units. At least one and not all the plurality of the functional units is a critical functional unit. Each critical functional unit supplies its output to a pipeline register. A comparator and multiplexer select a register input for each functional unit or the output of a corresponding pipeline register dependent. In the preferred embodiment, each critical functional unit has a throughput delay time longer than the average of throughput delay times of all functional units.

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patent: 1124181 (2001-08-01), None

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