Multi-bit semiconductor memory device allowing efficient testing

Details Multi-bit semiconductor memory device allowing efficient testing Multi-bit semiconductor memory device allowing efficient testing

1997-12-10

1999-06-15

Nelms, David

Static information storage and retrieval

Read/write circuit

Testing

36518901, 36518907, 36523005, G11C 700

Patent

active

059128518

ABSTRACT:
Data supplied to a particular data input/output terminal is selected and the selected data is subjected to logic change for each memory cell based on mode setting data from a changing mode setting circuit and is simultaneously written into memory cells simultaneously selected in a memory array. After a reading logic changing circuit changes the data of these simultaneously selected memory cells in the same manner as the writing logic changing circuit does, a coincidence
on-coincidence among the logics of these data is determined, and a signal representing a logic in coincidence is output if a coincidence is found. Thus, testing can be achieved at a high speed and accurately, using test data having various patterns, without increasing the number of data input/output terminals used in the testing operation.

REFERENCES:
patent: 5214609 (1993-05-01), Kato et al.
patent: 5777942 (1998-07-01), Dosaka et al.

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