Semiconductor device using fuse/anti-fuse system

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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Details

C257S330000, C257SE29131, C257SE29262, C257SE21141

Reexamination Certificate

active

07615813

ABSTRACT:
A first concave portion for the element isolation, a second concave portion for an aligning mark, and a third concave portion for an anti-fuse portion are formed simultaneously within a silicon substrate. After a silicon oxide film is formed on the entire surface, the silicon oxide film positioned within the second and third concave portions is removed. Then, a gate insulating film is formed on the entire surface, followed by forming a polysilicon film on the gate insulating film. Further, these polysilicon film and gate insulating film are selectively removed to form a gate electrode above an element region, an aligning mark portion in the second concave portion, and a gate electrode for an anti-fuse portion on the bottom surface of the third concave portion.

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Wolf, Stanley, “Silicon Processing for the VLSI Era: vol. 2 Process Integration,” Lattice Press, pp. 332-336.
JP Office Action dtd Oct. 7, 2008, JP Appln. 2001-040620.
JP Office Action dtd Feb. 3, 2009, JP Appln. 2001-040620.

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