Method of operating memory cell providing internal power...

Static information storage and retrieval – Systems using particular element – Flip-flop

Reexamination Certificate

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C365S156000, C365S226000

Reexamination Certificate

active

07626853

ABSTRACT:
Various implementations are provided that may be used to improve the writeability of individual memory cells providing internal power switching. For example, in one implementation, a method is provided for operating a memory device including a first static random access memory (SRAM) cell including first and second cross-coupled logic gates. The method includes providing a first power level to the first and second cross-coupled logic gates during a read operation performed on the first SRAM cell, and receiving a logic signal at the first SRAM cell. The method also includes switching within the first SRAM cell from providing the first power level to the cross-coupled logic gates to providing a second power level to the cross-coupled logic gates in response to the logic signal to facilitate writing a first logic state into the first SRAM cell.

REFERENCES:
patent: 7397693 (2008-07-01), Yamaoka et al.
patent: 7502275 (2009-03-01), Nii et al.

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