Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2006-10-20
2009-12-22
Siek, Vuthe (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000, C716S030000
Reexamination Certificate
active
07636904
ABSTRACT:
A computer is programmed to perform lithography simulation at a number of locations in a transverse direction relative to a length of a feature of an IC design, to obtain simulated intensities at the locations. The computer is further programmed to determine constants of a predetermined formula that models a trend of the simulated intensities as a function of distance (in the transverse direction), by curve-fitting. The computer is also programmed to compute a value (“CD predictor”) based on the just-determined constants, the formula and a known threshold intensity for a given position along the feature's length. The just-described process, of lithography-simulation, followed by curve-fitting, followed by CD predictor computation, is repeatedly performed to obtain a number of CD predictors at a corresponding number of positions along the feature's length. The CD predictors are used to identify a position of a critical dimension, for use in, for example, layout verification.
REFERENCES:
patent: 6453457 (2002-09-01), Pierrat et al.
patent: 6625801 (2003-09-01), Pierrat et al.
patent: 6703168 (2004-03-01), Misaka
patent: 6883158 (2005-04-01), Sandstrom et al.
patent: 7010775 (2006-03-01), Ohmori
patent: 7205077 (2007-04-01), Misaka
patent: 2004/0081899 (2004-04-01), Misaka
patent: 2005/0177811 (2005-08-01), Kotani et al.
Umatate, Toshikazu et al. “Controlling CD”, Mar. 2005, SPIE's oemagazine, 15-17, pp. 3.
Zait, Eitan et al. “CD Control Inside the Bulk Photomasks”, UCLT Ltd. Karmiel, Israel, Apr. 1, 2006, pp. 3.
Chapter 3, Section 3.1 “Polynomial Interpolation and Extrapolation” of the book “Numerical Recipes in C, The Art of Scientific Computing” by Press, W.H. et al, 1999, p. 108.
Chapter 3, Section 3.5 “Coefficients of the Interpolating Polynomial” of the book “Numerical Recipes in C, The Art of Scientific Computing” by Press, W.H. et al, 1999, p. 120.
Press, W. H. et al. “Numerical Recipes in C, The Art of Scientific Computing”, Second Edition, Cambridge University Press, 1999.
U.S. Appl. No. 11/142,789, filed on May 31, 2005 by ZongWu Tang et al.
Office Action dated Aug. 1, 2006 by Examiner Binh C. Tat in U.S. Appl. No. 11/142,789.
Amendment dated Oct. 25, 2006 in U.S. Appl. No. 11/142,789.
Notice of Allowance dated Jan. 11, 2007 in U.S. Appl. No. 11/142,789.
Song Hua
Tang ZongWu
Wang Lantiang
Filicon Valley Patent Group LLP
Siek Vuthe
Suryadevara Omkar
SYNOPSYS, Inc.
LandOfFree
Locating critical dimension(s) of a layout feature in an IC... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Locating critical dimension(s) of a layout feature in an IC..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Locating critical dimension(s) of a layout feature in an IC... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4063895