Semiconductor memories with block-dedicated programmable...

Details Semiconductor memories with block-dedicated programmable... Semiconductor memories with block-dedicated programmable...

2006-04-20

2009-02-03

Auduong, Gene N. (Department: 2827)

Static information storage and retrieval

Read/write circuit

Signals

C365S194000, C365S230080

Reexamination Certificate

active

07486575

ABSTRACT:
An apparatus and method to delay output of data from different regions of a memory device in response to a read enable signal, the delaying of the output of data is based on the location of the regions of the memory device with respect to an output circuit that receives the data, wherein the different regions of the memory device have different CAS latency values dedicated to each region to set the delay time of each region of the memory device.

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Taiwan Office Action mailed Jul. 31, 2008 in TW095123995.

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