Symmetrical and self-aligned non-volatile memory structure

Details Symmetrical and self-aligned non-volatile memory structure Symmetrical and self-aligned non-volatile memory structure

2005-02-28

2009-06-02

Weiss, Howard (Department: 2814)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S760000, C257SE21682, C257SE27103, C257SE29308

Reexamination Certificate

active

07541638

ABSTRACT:
A memory structure in a semiconductor substrate essentially comprises a first conductive line, two conductive blocks, two first dielectric spacers, a first dielectric layer, and a second conductive line. The first conductive line, e.g., a polysilicon line, is formed above the semiconductor substrate, and the two conductive blocks composed of polysilicon, for example, are formed at the two sides of the first conductive line and insulated from the first conductive line with the two first dielectric spacers. The first dielectric layer, such as an oxide
itride/oxide (ONO) layer, is formed on the two second conductive blocks and above the first conductive line, and the second conductive line is formed on the first dielectric layer and is substantially perpendicular to the two doping regions. Accordingly, the stack of the conductive block, the first dielectric layer, and the second conductive line form a floating gate structure which can store charges. The first conductive line and conductive blocks function as a select gate and floating gates, respectively, whereas the doping regions and the second conductive line function as bit lines and a word line, respectively.

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