Upgradable memory system with reconfigurable interconnect

Details Upgradable memory system with reconfigurable interconnect Upgradable memory system with reconfigurable interconnect

2001-02-28

2009-10-27

Elmore, Stephen C (Department: 2185)

Electrical computers and digital processing systems: memory

Storage accessing and control

Specific memory composition

C711S004000, C711S100000, C711S168000, C711S170000, C711S212000, C710S300000, C710S301000, C710S302000, C710S303000, C710S304000, C710S305000, C710S306000, C710S100000, C710S104000, C710S038000, C365S052000, C365S063000

Reexamination Certificate

active

07610447

ABSTRACT:
Described herein is a point-to-point memory communications architecture, having a point-to-point signal line set associated with each of a plurality of connectors or module positions. When the system is fully populated, there is a one-to-one correspondence between signal line sets and memory modules. In systems that are not fully populated, the system is configurable to use a plurality of the signal line sets for a single memory module.

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