FinFET flash memory device with an extended floating back gate

Details FinFET flash memory device with an extended floating back gate FinFET flash memory device with an extended floating back gate

2007-07-30

2009-11-17

Ha, Nathan W (Department: 2814)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257SE21209

Reexamination Certificate

active

07619276

ABSTRACT:
A floating gate is formed on one side of the semiconductor fin on a floating gate dielectric. A control gate dielectric is formed on the opposite side of the semiconductor fin and on the floating gate. A gate conductor is formed on the control gate dielectric across the semiconductor fin. A gate spacer reaching above a gate cap layer and the control gate dielectric thereupon is formed by a conformal deposition of a dielectric layer and a reactive ion etch. The control gate dielectric and the material of the floating gate are removed from exposed portions of the semiconductor fin. The gate spacer is thereafter removed and source and drain regions are formed in the semiconductor fin. The overlap between the drain and the floating gate is extended by the thickness of the gate spacer, resulting in an enhanced efficiency in charge trapping in the floating gate.

REFERENCES:
patent: 6445032 (2002-09-01), Kumar et al.
patent: 7087952 (2006-08-01), Zhu et al.
patent: 2008/0079060 (2008-04-01), Zhu
patent: 2009/0026523 (2009-01-01), Wong et al.
patent: 2009/0039420 (2009-02-01), Trivedi et al.
patent: 2009/0065853 (2009-03-01), Hanafi
patent: 2009/0072276 (2009-03-01), Inaba

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