Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

2007-06-29

2009-10-27

Pham, Ly D (Department: 2827)

Static information storage and retrieval

Read/write circuit

Including reference or bias voltage generator

C365S189190, C365S222000, C365S233100

Reexamination Certificate

active

07609566

ABSTRACT:
A semiconductor memory device includes a charge pumping circuit, a level sensor, an oscillator, and a pumping control signal generator. The charge pumping circuit performs a negative-pumping operation to an external power in order to generate an internal voltage having a level lower than the external power. The level sensor senses a level of the internal voltage corresponding to a level of an adjusted reference voltage during a refresh mode. The oscillator generates a period signal in response to a sensing signal of the level sensor. The pumping control signal generator controls the operation of the charge pumping circuit in response to the period signal.

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Korean Office Action issued in Patent Application No. 10-2007-0000409 dated on Jul. 9, 2008.

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