Simplified vertical array device DRAM/eDRAM integration:...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C257S300000, C257S301000, C257SE27096, C438S259000

Reexamination Certificate

active

07485910

ABSTRACT:
The present invention provides a semiconductor structure that includes an active wordline located above a semiconductor memory device and a passive wordline located adjacent to said active wordline and above an active area of a substrate. In accordance with the present invention, the passive wordline is separated from the active area by a pad nitride. The present invention also provides methods that are capable of forming the inventive semiconductor structure.

REFERENCES:
patent: 4816884 (1989-03-01), Hwang et al.
patent: 4833516 (1989-05-01), Hwang et al.
patent: 5225363 (1993-07-01), Riemenschneider et al.
patent: 5365097 (1994-11-01), Kenney
patent: 5396093 (1995-03-01), Lu
patent: 5433794 (1995-07-01), Fazan et al.
patent: 5541427 (1996-07-01), Chappell et al.
patent: 5627092 (1997-05-01), Alsmeier et al.
patent: 5869392 (1999-02-01), Kimura
patent: 5953607 (1999-09-01), Hakey et al.
patent: 6025245 (2000-02-01), Wei
patent: 6136686 (2000-10-01), Gambino et al.
patent: 6153902 (2000-11-01), Furukawa et al.
patent: 6174756 (2001-01-01), Gambino et al.
patent: 6222218 (2001-04-01), Jammy et al.
patent: 6228711 (2001-05-01), Hsieh
patent: 6238961 (2001-05-01), Asano et al.
patent: 6287913 (2001-09-01), Agnello et al.
patent: 6350653 (2002-02-01), Adkisson et al.
patent: 6403423 (2002-06-01), Weybright et al.
patent: 6437401 (2002-08-01), Mandelman et al.
patent: 6509226 (2003-01-01), Jaiprakash et al.
patent: 6548344 (2003-04-01), Beintner et al.
patent: 6610573 (2003-08-01), Weis
patent: 6620676 (2003-09-01), Malik et al.
patent: 6635526 (2003-10-01), Malik et al.
patent: 6727540 (2004-04-01), Divakaruni et al.
patent: 6750097 (2004-06-01), Divakaruni et al.
patent: 6787838 (2004-09-01), Chidambarrao et al.
patent: 6790739 (2004-09-01), Malik et al.
patent: 2003/0003653 (2003-01-01), Malik et al.
patent: 2003/0062568 (2003-04-01), Beintner
patent: 2003/0143809 (2003-07-01), Hummler
patent: 2003/0186502 (2003-10-01), Malik et al.
patent: 2004/0036100 (2004-02-01), Divakaruni et al.
patent: 2004/0066666 (2004-04-01), Chidambarrao et al.
patent: 2004/0219758 (2004-11-01), Birner et al.
patent: 2004/0256665 (2004-12-01), Birner et al.
patent: 2005/0247966 (2005-11-01), Adkisson et al.
Parker, C. G., Ultrathin Oxide-Nitride Gate Dielectric MOSFET's, IEEE Electron Device Letters, vol. 19, No. 4, Apr. 1998, pp. 106-108.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Simplified vertical array device DRAM/eDRAM integration:... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Simplified vertical array device DRAM/eDRAM integration:..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Simplified vertical array device DRAM/eDRAM integration:... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-4053703

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.