Method and apparatus for fragment processing in a virtual...

Details Method and apparatus for fragment processing in a virtual... Method and apparatus for fragment processing in a virtual...

2005-04-07

2008-11-04

Nguyen, T (Department: 2187)

Electrical computers and digital processing systems: memory

Address formation

Address mapping

C711S206000, C711S207000, C711S208000

Reexamination Certificate

active

07447869

ABSTRACT:
A method and apparatus for fragment processing in a virtual memory system are described. Embodiments of the invention include a coprocessor comprising a virtual memory system for accessing a physical memory. Page table logic and fragment processing logic scan a page table having a fixed, relatively small page size. The page table is broken into fragments made up of pages that are contiguous in physical address space and logical address space and have similar attributes. Fragments in logical address space begin on known boundaries such that the boundary indicates both a starting address of a fragment and the size of the fragment. Corresponding fragments in physical address space can begin anywhere, thus making the process transparent to physical memory. A fragment field in a page table entry conveys both fragment size and boundary information.

REFERENCES:
patent: 6189074 (2001-02-01), Pedneau
patent: 6370632 (2002-04-01), Kikuta et al.
patent: 6381682 (2002-04-01), Noel et al.
patent: 6446186 (2002-09-01), Priem et al.
patent: 6560688 (2003-05-01), Strongin et al.
patent: 2002/0169936 (2002-11-01), Murphy
patent: 2004/0215918 (2004-10-01), Jacobs et al.

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