Semiconductor device for limiting leakage current

Details Semiconductor device for limiting leakage current Semiconductor device for limiting leakage current

2006-06-08

2008-11-11

Tran, Thien F (Department: 2811)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S653000, C257S654000

Reexamination Certificate

active

07449749

ABSTRACT:
Formed on an insulator (9) are an N−type semiconductor layer (10) having a partial isolator formed on its surface and a P−type semiconductor layer (20) having a partial isolator formed on its surface. Source/drain (11, 12) being P+type semiconductor layers are provided on the semiconductor layer (10) to form a PMOS transistor (1). Source/drain (21, 22) being N+type semiconductor layers are provided on the semiconductor layer (20) to form an NMOS transistor (2). A pn junction (J5) formed by the semiconductor layers (10, 20) is provided in a CMOS transistor (100) made up of the transistors (1, 2). The pn junction (J5) is positioned separately from the partial isolators (41, 42), where the crystal defect is thus very small. Therefore, the leakage current is very low at the pn junction (J5).

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