Static information storage and retrieval – Floating gate – Particular biasing
Reexamination Certificate
2007-01-03
2008-11-11
Pham, Ly D (Department: 2827)
Static information storage and retrieval
Floating gate
Particular biasing
C257S315000, C257S316000, C257S324000
Reexamination Certificate
active
07450423
ABSTRACT:
A method of operating a memory cell by applying a positive voltage to the gate sufficient to cause hole tunneling from the gate toward the charge storage layer is disclosed. The method is applied to a memory cell including a semiconductor layer having at least two source/drain regions disposed below a surface of the semiconductor layer and separated by a channel region. The memory cell also has a lower insulating layer disposed above the channel region; a charge storage layer disposed above the lower insulating layer; an upper insulating multi-layer structure disposed above the charge storage layer. The upper insulating multi-layer structure comprises a lower dielectric layer and an upper nitride layer disposed above the lower dielectric layer and the memory cell has a gate disposed above the upper insulating multi-layer structure.
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Hsieh Jung-Yu
Hsieh Kuang-Yeu
Hsu Tzu-Hsuan
Lai Erh-Kun
Lee Shih-Chih
Jianq Chyun IP Office
Macronix International Co. Ltd.
Pham Ly D
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