Multi-port dynamic memory structures

Details Multi-port dynamic memory structures Multi-port dynamic memory structures

2007-01-16

2008-12-16

Tran, Michael T (Department: 2827)

Static information storage and retrieval

Read/write circuit

Data refresh

C365S205000

Reexamination Certificate

active

07466617

ABSTRACT:
A dynamic random access memory circuit has at least one write bit line, at least one read bit line, a capacitive storage device, a write access device operatively coupled to the capacitive storage device and the at least one write bit line, a sense amplifier operatively coupled to the at least one read bit line and configured to generate an output signal, and a refresh bypass device operatively associated with the sense amplifier and the at least one write bit line so as to selectively pass the output signal to the at least one write bit line.

REFERENCES:
patent: 3387286 (1968-06-01), Dennard
patent: 5768186 (1998-06-01), Ma
patent: 6211548 (2001-04-01), Ma
patent: 6475874 (2002-11-01), Xiang et al.
patent: 6573134 (2003-06-01), Ma et al.
patent: 6614064 (2003-09-01), Besser et al.
patent: 6664589 (2003-12-01), Forbes et al.
patent: 6750066 (2004-06-01), Cheung et al.
patent: 6916698 (2005-07-01), Mocuta et al.
patent: 6924184 (2005-08-01), Cave et al.
patent: 7027326 (2006-04-01), Luk et al.
patent: 2001/0035548 (2001-11-01), Wahlstrom
patent: 2005/0128803 (2005-06-01), Luk et al.
patent: 2005/0145895 (2005-07-01), Luk et al.
Doris et al., “High Performance FDSOI CMOS Technology with Metal Gate and High-k,” 4-900784-00-1, Symp on VLSI Techn Digest of Technical Papers, pp. 214-215 (2005).
Hou et al., “Impact of Metal Gate Work Function on Nano CMOS Device Performance,” 0-7803-8511-X, IEEE, pp. 57-60 (2004).
Luk et al., “Dynamic Memory Cell Structures,” U.S. Appl. No. 11/408,752 (Apr. 21, 2006).
Park et al., “Novel Damage-free Direct Metal Gate Process Using Atomic Layer Deposition,” Symp on VLSI Techn Digest of Tech. Papers, pp. 65-66 (2001).
Karp et al., “A 4096-bit dynamic MOS RAM,” ISSCC Digest Technical Papers, pp. 10-11 (Feb. 1972).
Zhu et al., “Schottky s/d MOSFETs with high-K gate dielectrics and metal gate electrodes,” 0-7803-8511-X, IEEE, pp. 53-56 (2004).

Affiliated with

Also associated with

Rating

Multi-port dynamic memory structures does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Multi-port dynamic memory structures, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Multi-port dynamic memory structures will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-4044920