MOSFET having buried shield plate for reduced gate/drain capacit

Details MOSFET having buried shield plate for reduced gate/drain capacit MOSFET having buried shield plate for reduced gate/drain capacit

1997-08-04

1999-06-15

Wojciechowicz, Edward

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257409, 257365, 257366, H01L 2972

Patent

active

059124903

ABSTRACT:
Gate to drain capacitance in a lateral DMOS and vertical DMOS field effect transistor is minimized by providing a conductive shield plate under the gate and between the gate and the drain of the transistor. In operation, the shield plate is preferably connected to a DC voltage potential and coupled to AC ground for RF power applications. The shield plate is readily fabricated in a conventional polysilicon gate process by adding one additional polysilicon deposition (or other suitable material), one additional mask, and one additional etch step. The shield plate can include a raised portion which provides lateral capacitive isolation between the gate and the drain. Alternatively, a shield contact can be provided above the shield plate and between the gate and drain to provide lateral isolation.

REFERENCES:
patent: 5252848 (1993-10-01), Adler et al.
patent: 5362979 (1994-11-01), Merchant
patent: 5445978 (1995-08-01), Yilmaz
patent: 5672526 (1997-09-01), Kawamura

Affiliated with

Also associated with

Rating

MOSFET having buried shield plate for reduced gate/drain capacit does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with MOSFET having buried shield plate for reduced gate/drain capacit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and MOSFET having buried shield plate for reduced gate/drain capacit will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-404282