Power supply voltage detecting circuit for use in semiconductor

Communications: electrical – Condition responsive indicating system – Specific condition

Patent

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Details

340660, 365226, 365227, G08B 2100

Patent

active

059072830

ABSTRACT:
A power supply voltage detecting circuit for preventing a current from being supplied to a chip in a stand-by state when a chip is not in operation, which is capable of being used even at a low power supply voltage. The power supply voltage detecting circuit for operating at a low power supply voltage includes a power supply voltage node whose output voltage varies as a function of an external power supply voltage, and a reference voltage node having a given voltage characteristic in accordance with the external power supply voltage. The circuit comprises: a differential amplifier which includes first and second N-type transistors and first and second P-type transistors, for comparing output voltages of the power supply voltage node and the reference voltage node; a fifth N-type transistor which has a gate connected with the reference voltage node; third and fourth N-type transistors, each connected with the fifth N-type transistor and having a gate regulated by a chip selection signal; a sixth N-type transistor having a gate regulated by an inverted chip selection signal; and a NOR gate, for finally outputting an output voltage of a logic low state at all times when a chip is in a stand-by state.

REFERENCES:
patent: 4800533 (1989-01-01), Arakawa
patent: 5307318 (1994-04-01), Nemoto
patent: 5426616 (1995-06-01), Kajigaya et al.
patent: 5444659 (1995-08-01), Yokokura
patent: 5592423 (1997-01-01), Tokami

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