Memory device commands

Electrical computers and digital processing systems: memory – Storage accessing and control – Access timing

Reexamination Certificate

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Details

C711S106000, C365S212000, C700S299000

Reexamination Certificate

active

07454586

ABSTRACT:
Data regarding physical parameters and security and commands to send such data can be communicated between a memory device and a memory controller using a memory bus connected between the two. In one embodiment, the invention includes receiving a first command at a memory device on a memory bus, the first command being other than a read or write command, and receiving a second command together with the first command, the second command to be initiated using lines that are not used by the first command.

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Gillingham, P. et al., “SLDRAM: High-Performance, Open-Standard Memory” IEEE Micro, IEEE Service Center, Los Alamitos, CA. US., vol. 17, No. 6, Nov. 1997, pp. 23-39, XP000726002, ISSN: 0272-1732, p. 34.
PCT Search Report, PCT/US2006/012995, Date mailed Sep. 1, 2006, Applicant: Intel Corporation.

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