Method of making CMOS devices on strained silicon on glass

Details Method of making CMOS devices on strained silicon on glass Method of making CMOS devices on strained silicon on glass

2005-02-18

2008-12-30

Menz, Douglas M (Department: 2891)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

On insulating substrate or layer

C438S458000, C257SE21088

Reexamination Certificate

active

07470573

ABSTRACT:
A method of making CMOS devices on strained silicon on glass includes preparing a glass substrate, including forming a strained silicon layer on the glass substrate; forming a silicon oxide layer by plasma oxidation of the strained silicon layer; depositing a layer of doped polysilicon on the silicon oxide layer; forming a polysilicon gate; implanting ions to form a LDD structure; depositing and forming a spacer dielectric on the gate structure; implanting and activation ions to form source and drain structures; depositing a layer of metal film; annealing the layer of metal film to form salicide on the source, drain and gate structures; removing any unreacted metal film; depositing a layer of interlayer dielectric; and forming contact holes and metallizing.

REFERENCES:
patent: 6277679 (2001-08-01), Ohtani
patent: 6355941 (2002-03-01), Yamazaki et al.
patent: 6524935 (2003-02-01), Canaperi et al.
patent: 6689646 (2004-02-01), Joshi et al.
patent: 6777761 (2004-08-01), Clevenger et al.
patent: 6784037 (2004-08-01), Yamazaki et al.
patent: 6787806 (2004-09-01), Yamazaki et al.
patent: 2003/0227057 (2003-12-01), Lochtefeld et al.
patent: 2004/0026765 (2004-02-01), Currie et al.
patent: 2004/0229444 (2004-11-01), Couillard et al.
patent: 2005/0020094 (2005-01-01), Forbes et al.
patent: 2005/0095766 (2005-05-01), Yang
patent: 2005/0253193 (2005-11-01), Chen et al.
patent: 2006/0019464 (2006-01-01), Maa et al.
Nishisaka, M. et al., “Application of plasma oxidation to strained-Si/SiGe MOSFET”, Mat. Sci. in Semi. Processing 8 (2005) pp. 225-230.
Yang, T. et al., “Study of Nicel Silicide Contact on Si/Si1-xGex”, IEEE Electron. Dev. Lett., vol. 24, No. 9, Sep. 2003 pp. 544-546.
Bera, L.K., et al., “Oxidation of strained Si in a microwave electron cyclotron resonance plasma”, Appl. Phys. Lett. 70 (2) 1997 pp. 217-219.
Gambino, J. P.,et al., “Silicides and ohmic contacts”, Materials Chemistry and Physics, 52 (1998) 99-146.
Bera, L.K., et al. Appl. Phys. Lett. 70 (2), Jan. 13, 1997.
Nishisaka, M., et al., Materials Science in Semiconductor Processing 8 (2005) 225-230.
Yang, T., et al., IEEE Electron Device Letters, vol. 24, No. 9, Sep. 2003.
Bright, A.A, et al. “Low-Rate Plasma Oxidation of Si in a Dilute Oxygen/Helium Plasma for Low-Temperature Gate Quality Si/SiO2 Interfaces.” Applied Physics Letters. vol. 58, No. 6 (Feb. 11, 1991): pp. 619-621.
Shi et al.,Characterization of Low-Temperature Processed Single-Crystalline Silicon Thin-Film Transistor on Glass, IEEE Electron Device Letters, vol. 24, No. 9, pp. 574-576 (2003).
Tai et al.,Performance of Poly-Si TFTs fabricated by SELAX, IEEE Trans. Electron Devices, vol. 51, No. 6, pp. 934-939 (2004).
Mizuki et al.,Large Domains of Continuous Grain Silicon on Glass Substrate for High-Performance TFTs, IEEE Trans. Electron Devices, vol. 51, No. 2, pp. 204-211 (2004).
Walker et al.,Improved Off-Current and Subthreshold Slope in Aggressively Scaled Poly-Si TFTs With a Single Grain Boundary in the Channel, IEEE Trans. Electron Devices, vol. 51, No. 2, pp. 212-219 (2004).

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