Transistor structure and method for making same

Details Transistor structure and method for making same Transistor structure and method for making same

2001-05-16

2008-12-02

Smith, Zandra (Department: 2822)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S395000, C257S900000, C257SE21194, C257SE21433, C257SE29266, C438S287000, C438S303000, C438S439000

Reexamination Certificate

active

07459758

ABSTRACT:
A gate structure in a transistor and method for fabricating the structure. A gate structure is formed on a substrate. The gate structure includes three layers: an oxide layer, a nitride layer and a polysilicon layer. The oxide layer is located on the substrate, the nitride layer is located on the oxide layer, and the polysilicon layer is located on the nitride layer. The gate structure is reoxidized to form a layer of oxide over the gate structure.

REFERENCES:
patent: 3576478 (1971-04-01), Watkins et al.
patent: 3892891 (1975-07-01), Goodman et al.
patent: 3898105 (1975-08-01), Mai et al.
patent: 3899363 (1975-08-01), Dennard et al.
patent: 3909304 (1975-09-01), Cho
patent: 3913126 (1975-10-01), Hooker et al.
patent: 3913211 (1975-10-01), Seeds et al.
patent: 3943542 (1976-03-01), Ho et al.
patent: 3958323 (1976-05-01), De La Moneda
patent: 3966501 (1976-06-01), Nomura et al.
patent: 3996658 (1976-12-01), Takei et al.
patent: 4013484 (1977-03-01), Boleky et al.
patent: 4023195 (1977-05-01), Richman
patent: 4039359 (1977-08-01), Nakamoto
patent: 4045249 (1977-08-01), Hotta
patent: 4075045 (1978-02-01), Rideout
patent: 4092661 (1978-05-01), Watrous, Jr.
patent: 4112575 (1978-09-01), Fu et al.
patent: 4113533 (1978-09-01), Okumura et al.
patent: 4179311 (1979-12-01), Athanas
patent: 4192059 (1980-03-01), Khan et al.
patent: 4322881 (1982-04-01), Enomoto et al.
patent: 4329773 (1982-05-01), Geipel et al.
patent: 4506437 (1985-03-01), Godejahn, Jr.
patent: 4553314 (1985-11-01), Chan et al.
patent: 4583281 (1986-04-01), Ghezzo et al.
patent: 4774197 (1988-09-01), Haddad et al.
patent: 4869781 (1989-09-01), Euen et al.
patent: 4897364 (1990-01-01), Nguyen et al.
patent: 5254867 (1993-10-01), Fukuda et al.
patent: 5422291 (1995-06-01), Clementi et al.
patent: 5668028 (1997-09-01), Bryant
patent: 5710453 (1998-01-01), Bryant
patent: 1421363 (1976-01-01), None
patent: 1428713 (1976-03-01), None
patent: 51-12507 (1976-04-01), None
patent: 51-39835 (1976-10-01), None
patent: 51-118392 (1976-10-01), None
patent: 51-118393 (1976-10-01), None
patent: 51-41515 (1976-11-01), None
patent: 52-42670 (1977-10-01), None
patent: 60-785 (1985-01-01), None
patent: 62-79625 (1987-04-01), None
“Fabrication Technique for Fully Recessed Oxide Isolation”, IBM Technical Disclosure Bulletin, Mar. 1977, vol. No. 19, Issue No. 10, p. 2947-3950.
C.R. Fritzsche, et al., “Thermal Oxidation of Silicon after Ion Implantation,” vol. 120, No. 11 1605, 1973.
K. Nomura, et al., Enhanced Oxidation of Silicon by Ion Implantation and its Novel Application 681-688.

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