Method for manufacturing and structure for transistors with...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257S388000, C257SE29062

Reexamination Certificate

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07459734

ABSTRACT:
A method for manufacturing a transistor includes providing a transistor assembly having a semiconductor layer with a first surface, a dielectric layer disposed on the first surface, a gate electrode disposed on the dielectric layer, an insulation layer adjacent at least part of the gate electrode, and a nitride spacer layer adjacent at least part of the insulation layer. The method also includes depositing, on part of the first surface, a material that will react with the semiconductor layer to form silicide and removing the unreacted material. The method further includes etching the nitride spacer layer, depositing a pre-metal spacer layer adjacent at least part of the nitride spacer layer and at least part of the first surface, etch removing a portion of the pre-metal spacer layer to expose part of the silicided portion of the first surface, and forming a contact with the silicided portion of the first surface.

REFERENCES:
patent: 5757045 (1998-05-01), Tsai et al.
patent: 6013569 (2000-01-01), Lur et al.
patent: 6156654 (2000-12-01), Ho et al.
patent: 6165826 (2000-12-01), Chau et al.
patent: 6180501 (2001-01-01), Pey et al.
patent: 6242354 (2001-06-01), Thomas
patent: 6545370 (2003-04-01), Ngo et al.
Wolf, Stanley, et al., “Silicon Processing for the VLSI Era,” vol. 1, Process Technology, Lattice Press, Sunset Beach, CA, 1986, pp. 144-147, 534.

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