Electrical computers and digital processing systems: memory – Address formation – Combining two or more values to create address
Reexamination Certificate
2003-07-25
2008-10-14
Bataille, Pierre-Michel (Department: 2186)
Electrical computers and digital processing systems: memory
Address formation
Combining two or more values to create address
C711S202000, C712S043000, C712S208000, C712S229000
Reexamination Certificate
active
07437532
ABSTRACT:
A memory mapped register file is disclosed for a data processing system that comprises a memory unit, input ports, and output ports. The memory unit includes a plurality of registers addressable by an encoded address, wherein the encoded address corresponds to a respective one of the plurality of registers and a corresponding processor mode. The input ports receive inputs for addressing at least one register using an encoded address. The output ports output data from at least register addressable by an encoded address.
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Chen Hong-Yi
Fan Henry Hin Kwong
Bataille Pierre-Michel
Marvell International Ltd.
Patel Hetul
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